Wireless sensor networks are becoming widely diffused because of the flexibility and scalability they offer. However, distributed measurements are significant only if the readout is coupled to time information. For this reason, network-wide time synchronization is the main concern. The objective of this paper is to exploit a very simple hardware implementation of an IR-UWB radio for realizing an accurate synchronization system for wireless sensors. The proposed solution relies on commercial-off-the-shelf discrete electronic components (rather than on specialized transceivers). It is designed for providing accurate timestamping of the packet time of arrival (TOA) to an adder-based tunable clock, which tracks the network time reference. The comprehensive set of experimental results based on prototypes, shows a TOA detection error with a standard deviation well below 1 ns. On the other hand, in the FPGA based prototype, the synchronization performance reaches an overall synchronization error of few nanoseconds. Finally, in order to highlight the tradeoff between timestamping accuracy, clock stability, and synchronization performance, some additional simulations have been carried out: a synchronization error in the order of 1 ns is possible, if good local oscillator sources are available in the nodes and if the adjustable clock has a sufficient resolution.

Low Complexity UWB Radios for Precise Wireless Sensor Network Synchronization

CARBONE, Paolo;CAZZORLA, ALESSANDRO;MOSCHITTA, Antonio;
2013

Abstract

Wireless sensor networks are becoming widely diffused because of the flexibility and scalability they offer. However, distributed measurements are significant only if the readout is coupled to time information. For this reason, network-wide time synchronization is the main concern. The objective of this paper is to exploit a very simple hardware implementation of an IR-UWB radio for realizing an accurate synchronization system for wireless sensors. The proposed solution relies on commercial-off-the-shelf discrete electronic components (rather than on specialized transceivers). It is designed for providing accurate timestamping of the packet time of arrival (TOA) to an adder-based tunable clock, which tracks the network time reference. The comprehensive set of experimental results based on prototypes, shows a TOA detection error with a standard deviation well below 1 ns. On the other hand, in the FPGA based prototype, the synchronization performance reaches an overall synchronization error of few nanoseconds. Finally, in order to highlight the tradeoff between timestamping accuracy, clock stability, and synchronization performance, some additional simulations have been carried out: a synchronization error in the order of 1 ns is possible, if good local oscillator sources are available in the nodes and if the adjustable clock has a sufficient resolution.
File in questo prodotto:
Non ci sono file associati a questo prodotto.

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11391/1156281
Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus 35
  • ???jsp.display-item.citation.isi??? 30
social impact