The widespread diffusion of wireless communication systems for personal telecommunications calls for the single-chip, standard-technology integration of low-cost, low-power, RF systems. Submicron MOS technology allows for the implementation of active devices which may already comfortably operate into the RF frequency range; the integration of high-quality, solid-state passive components, however, is definitely more troublesome. In particular, inductors are key components for many subsystems in RF architectures, and mostly suffer from performance limitation coming from the adoption of microelectronic fabrication technology: the operating principle of such components is indeed basically three-dimensional, and is therefore inherently scarcely compatible with standard IC planar technologies. Integrated inductors are customarily obtained by patterning a spiral shape on a metal plane: in principle, building small-size, planar inductors is difficult because of the inherently non-planar behavior of a coil (the magnetic flux being orthogonal to the current-flow plane) and of the lack of magnetic materials. Designing planar inductors thus results in large area consumption and in unwanted, yet unavoidable, interaction with adjacent layers: most notably, strong deviation from the ideal behavior is usually due to the close proximity to highly-doped silicon substrates [1]. Experimental results show the poor performances calling for a deeper investigation. A sensible characterization of this behavior, although being rather a difficult task, is hence of crucial importance. Straightforward geometrical reasoning can be exploited to describe the inductor at a sufficient degree of accuracy only for extremely simple cases. As soon as parasitic components become significant, more sophisticated techniques need to be used. In this work, we describe the application of physically-accurate simulation tools to the evaluation of integrated silicon spiral inductors: by means of three-dimensional, distributed electromagnetic field analysis, the inductor performance can be straightforwardly correlated to its geometrical peculiarities and to the fabrication process features. The performance of actual inductors has been correctly predicted and an automatic procedure has been developed for the extraction of equivalent-circuit components. This generic and process-independent approach generates lumped-element models that easily plug into the RF IC design flow. Their accuracy is established through comparison with measurements of fabricated test structures. By exploiting the capability of the “full-wave” simulator of making available internal device fields and currents, detrimental effects related to the specific technology adopted have also been evaluated and physically interpreted. Even if, because of their inherent computational demand, “full-wave'' analysis techniques can hardly be applied at the whole-chip level, they can be exploited, within a hierarchical design flow, to extract an accurate and physically-grounded characterization of compact, synthetic models of critical propagation regions. Thus a detailed understanding and evaluation of parasitics is made possible, allowing, in turn, for the sensible characterization of compact CAD models to be used in the circuit design flow. The simulation scheme we adopt relies on the ``full-wave'' solution of Maxwell's equations, carried out by means of a ``Finite-Difference Time-Domain'' (FDTD) algorithm. This approach is based on the numerical, self-consistent solution of Maxwell's time-dependent curl equations and lumped element equations. To this purpose, the space is divided in a finite number of elementary cells where electric and magnetic fields are mapped (forming the computational volume), while the time solution is obtained by an iterative scheme which evaluates the electric and magnetic field components at alternate half-time steps. On the other hand, lumped element are incorporated into such a framework using the generalized Ampere's law. Features relevant to the application at hand include: • non-uniform mesh spacing to avoid redundant node distribution [2]; • field absorbing boundary conditions have been imposed to account for field radiating out of the chip [3]; • the self-consistent solution of field equation with a network of external, lumped-element components (LE-FDTD, [4]) exploited here to account for a realistic signal source; • de-embedding and parameter-extraction procedures, needed for the simulation-based characterization of SPICE models. Our attention has been focused on silicon integrated spiral inductors suited for RF ICs. They have actually been fabricated using a standard CMOS process, i.e. Alcatel CMOS 0.35 um and electrically tested, thus providing us with experimental validation of the modeling approach. The basic inductor is obtained by a square spiral pattern, featuring two turns on the upper layer and a return path on the underlying layer. The metal wires are insulated from the silicon layers by a SiO2 layer. Below the oxide, the considered fabrication process features an epilayer and a rather conductive thick silicon substrate. The semiconductor layers are modelled as linear media and have been characterized by a doping-dependent electrical conductivity. The SiO2 layer is assumed to behave as an ideal dielectric material. Metal and polysilicon layers are assumed of finite conductivity to account for ohmic losses. The analysis proceeds as follows: first, a wide-band Gaussian pulse is applied to the inductor using the lumped voltage generator (internal resistance equal to 50 ohm)[4]. The other port of the inductor is maintained at ground potential during the analysis. Then, full-wave propagation of the pulse, which inherently accounts for parasitic paths of any kind, is simulated by the FDTD algorithm, providing the time-domain inductor response. As a post-process option, the impedance spectral components are extracted by applying a DFT transform. From these components, the actual equivalent inductance, resistance and quality factor are eventually computed. Furthermore, the extraction of frequency-domain field and current surfaces on arbitrary cross-sections is available in order to study the eddy currents paths and the penetration of electric and magnetic fields into the lossy substrate. Measurements have been carried out at the wafer level by means of an HP 8720 network analyser and a probe station with GSG-pattern probe tips featuring a 150 um pitch. The device has been embedded in a coplanar test structure with pad dimensions of 100x100 um. The SOLT calibration procedure has been performed by means of a standard calibration substrate. Finally, a pad de-embedding procedure has been carried out, using an integrated open structure. The overall agreement is good, in terms of peak quality factor (Q) and self-resonance frequency. The critical impact of parasitic phenomena reflects on rather poor values of Q (if compared with technologies more explicitly oriented to high-frequency applications, such as GaAs). This is due to different and interacting phenomena, the relative importance of which can be estimated by means of the physical simulation scheme exploited here. The peculiar shape of such curves can be interpreted by looking at asymptotic limiting factors. At low frequency, the dominant factor consists of the non negligible series resistance of the coil (due to the finite conductivity of aluminium and to the small cross-section). Substrate losses, instead, have different origins. First, the electric field penetrates from the inductor into the substrate, closing a ground return path and thus dissipating energy by Joule heating. The magnetic field, concatenated with the spiral, penetrates into the substrate as well and induces some concatenated “eddy” current to flow into the substrate itself, thus further dissipating energy. Simulation results provide effective means to discriminate the relative weight of either energy-loss sources. The current density, therefore, can be interpreted as a fringing (inter-wire or substrate-bound) current, which clearly dominates over the magnetic-field induced current. The design flow of complex Si-RF integrated circuits heavily relies on CAD tools: among them, circuit simulation plays a fundamental role in analysing the behavior of analog (or mixed-signal) circuits. It is of the outmost importance, therefore, to provide circuit simulators (e.g., SPICE or microwave oriented ADS) with accurate, yet computationally affordable, models of the integrated devices. These models, as well as the FDTD approach, should account for actual technology parameters. A CMOS process in fact is optimised for digital applications, which hardly suffer from technology corners [5]. By contrast, due to electromagnetic phenomena taking place in the three-dimensional structure, analog applications are extremely sensitive to the fabrication process, thus models must assure that the designed inductor will perform as predicted. In this contest, a significant aid may come from the FDTD approach, which can easily correlate the inductor behavior with process parameters. The maximum and the minimum resistivity and thickness for the metal layers and the substrate are simulated and compared to the typical values. As expected the results demonstrate a great influence of such parameters on the inductor performance. On such a basis, starting from simulations, we have extracted the model parameters, being sure to account for process latitude. With reference to silicon-integrated inductors, several authors [6] have investigated such an issue, proposing lumped-element equivalent circuit topologies: by means of the distributed simulation approach introduced above, characterization of the model parameters can be carried out in a virtual environment, avoiding the need of an a posteriori experimental parameter extraction. Starting from simulated data, a two-step optimisation procedure has been carried out on the parameter values: first, a least-square fitting procedure has been performed by means of a dedicated program; then, parameters are more finely adjusted by using a commercial circuit optimiser. The good agreement between the ADS (definizione!) and the FDTD simulation demonstrates the accuracy of the proposed approach, which can, hence, be safely used to extract the equivalent circuit parameter values for the considered inductor accounting for process latitude. In summary, by resorting to 3D, numerical solution of Maxwell equations, we were able to predict quite accurately the behavior of actual planar integrated inductors and to evaluate the impact of some technological and design options. Among the advantages of such an approach, it is worth remarking its contribution to the physical and intuitive interpretation of the actual device behavior. This allowed, within a context which inherently suffers from an intricate set of interacting parasitic phenomena, for the comprehensive evaluation and discrimination of basic degradation effects. The good agreement obtained between measurements and simulations demonstrates that the developed virtual environment, capable of accounting for both technology and design layout parameters, is a useful, cheaper than fabrication, aid for the extraction of compact device models, suitable for commercial CAD packages. [1] J. Burghartz, “Progress in RF inductors on silicon- Understanding substrate losses”, Dig. IEDM, 1998. [2] W. Heinrich, K. Beilenhoff, P. Mezzanotte, and L. Roselli, "Optimum mesh grading for finite-difference method“, IEEE Trans. Microwave Theory Tech., vol. 44, pp. 1569-1574, Set 1996. [3] G. Mur, “Absorbing boundary conditions for the finite-difference approximation of the time-domain electromagnetic-field equations”, IEEE Trans. Electromagn. Compat., vol. EMC-23, no. 4, pp.377-382, 1981. [4] W. Sui, D. Christensen, and. C. Durney, “Extending the two-dimensional fd-td method to hybrid electromagnetic systems with active and passive lumped elements”, IEEE Trans. Microwave Theory Tech., vol. 40, pp. 724-730, 1992. [5] A. Niknejad and R. Meyer, “Analysis, design and optimisation of spiral inductors and transformers for Si RFIC’s”, IEEE Journal of Solid State Circuits, vol.33, pp.1470-1481, Oct. 1998. [6] W. B. Kuhn and W. Stephenson, “A 200 MHz CMOS Q-Enhanced LC Bandpass Filter”, IEEE Jounal of Solid State Circuits, vol. 31, pp. 1112-1121, Aug. 1996.
Time Domain Modeling of Silicon Integrated Spiral Inductors in RF IC Design
PALAZZARI, VALERIA;PLACIDI, Pisana;STOPPONI, Giovanni;ALIMENTI, Federico;ROSELLI, Luca;SCORZONI, Andrea
2002
Abstract
The widespread diffusion of wireless communication systems for personal telecommunications calls for the single-chip, standard-technology integration of low-cost, low-power, RF systems. Submicron MOS technology allows for the implementation of active devices which may already comfortably operate into the RF frequency range; the integration of high-quality, solid-state passive components, however, is definitely more troublesome. In particular, inductors are key components for many subsystems in RF architectures, and mostly suffer from performance limitation coming from the adoption of microelectronic fabrication technology: the operating principle of such components is indeed basically three-dimensional, and is therefore inherently scarcely compatible with standard IC planar technologies. Integrated inductors are customarily obtained by patterning a spiral shape on a metal plane: in principle, building small-size, planar inductors is difficult because of the inherently non-planar behavior of a coil (the magnetic flux being orthogonal to the current-flow plane) and of the lack of magnetic materials. Designing planar inductors thus results in large area consumption and in unwanted, yet unavoidable, interaction with adjacent layers: most notably, strong deviation from the ideal behavior is usually due to the close proximity to highly-doped silicon substrates [1]. Experimental results show the poor performances calling for a deeper investigation. A sensible characterization of this behavior, although being rather a difficult task, is hence of crucial importance. Straightforward geometrical reasoning can be exploited to describe the inductor at a sufficient degree of accuracy only for extremely simple cases. As soon as parasitic components become significant, more sophisticated techniques need to be used. In this work, we describe the application of physically-accurate simulation tools to the evaluation of integrated silicon spiral inductors: by means of three-dimensional, distributed electromagnetic field analysis, the inductor performance can be straightforwardly correlated to its geometrical peculiarities and to the fabrication process features. The performance of actual inductors has been correctly predicted and an automatic procedure has been developed for the extraction of equivalent-circuit components. This generic and process-independent approach generates lumped-element models that easily plug into the RF IC design flow. Their accuracy is established through comparison with measurements of fabricated test structures. By exploiting the capability of the “full-wave” simulator of making available internal device fields and currents, detrimental effects related to the specific technology adopted have also been evaluated and physically interpreted. Even if, because of their inherent computational demand, “full-wave'' analysis techniques can hardly be applied at the whole-chip level, they can be exploited, within a hierarchical design flow, to extract an accurate and physically-grounded characterization of compact, synthetic models of critical propagation regions. Thus a detailed understanding and evaluation of parasitics is made possible, allowing, in turn, for the sensible characterization of compact CAD models to be used in the circuit design flow. The simulation scheme we adopt relies on the ``full-wave'' solution of Maxwell's equations, carried out by means of a ``Finite-Difference Time-Domain'' (FDTD) algorithm. This approach is based on the numerical, self-consistent solution of Maxwell's time-dependent curl equations and lumped element equations. To this purpose, the space is divided in a finite number of elementary cells where electric and magnetic fields are mapped (forming the computational volume), while the time solution is obtained by an iterative scheme which evaluates the electric and magnetic field components at alternate half-time steps. On the other hand, lumped element are incorporated into such a framework using the generalized Ampere's law. Features relevant to the application at hand include: • non-uniform mesh spacing to avoid redundant node distribution [2]; • field absorbing boundary conditions have been imposed to account for field radiating out of the chip [3]; • the self-consistent solution of field equation with a network of external, lumped-element components (LE-FDTD, [4]) exploited here to account for a realistic signal source; • de-embedding and parameter-extraction procedures, needed for the simulation-based characterization of SPICE models. Our attention has been focused on silicon integrated spiral inductors suited for RF ICs. They have actually been fabricated using a standard CMOS process, i.e. Alcatel CMOS 0.35 um and electrically tested, thus providing us with experimental validation of the modeling approach. The basic inductor is obtained by a square spiral pattern, featuring two turns on the upper layer and a return path on the underlying layer. The metal wires are insulated from the silicon layers by a SiO2 layer. Below the oxide, the considered fabrication process features an epilayer and a rather conductive thick silicon substrate. The semiconductor layers are modelled as linear media and have been characterized by a doping-dependent electrical conductivity. The SiO2 layer is assumed to behave as an ideal dielectric material. Metal and polysilicon layers are assumed of finite conductivity to account for ohmic losses. The analysis proceeds as follows: first, a wide-band Gaussian pulse is applied to the inductor using the lumped voltage generator (internal resistance equal to 50 ohm)[4]. The other port of the inductor is maintained at ground potential during the analysis. Then, full-wave propagation of the pulse, which inherently accounts for parasitic paths of any kind, is simulated by the FDTD algorithm, providing the time-domain inductor response. As a post-process option, the impedance spectral components are extracted by applying a DFT transform. From these components, the actual equivalent inductance, resistance and quality factor are eventually computed. Furthermore, the extraction of frequency-domain field and current surfaces on arbitrary cross-sections is available in order to study the eddy currents paths and the penetration of electric and magnetic fields into the lossy substrate. Measurements have been carried out at the wafer level by means of an HP 8720 network analyser and a probe station with GSG-pattern probe tips featuring a 150 um pitch. The device has been embedded in a coplanar test structure with pad dimensions of 100x100 um. The SOLT calibration procedure has been performed by means of a standard calibration substrate. Finally, a pad de-embedding procedure has been carried out, using an integrated open structure. The overall agreement is good, in terms of peak quality factor (Q) and self-resonance frequency. The critical impact of parasitic phenomena reflects on rather poor values of Q (if compared with technologies more explicitly oriented to high-frequency applications, such as GaAs). This is due to different and interacting phenomena, the relative importance of which can be estimated by means of the physical simulation scheme exploited here. The peculiar shape of such curves can be interpreted by looking at asymptotic limiting factors. At low frequency, the dominant factor consists of the non negligible series resistance of the coil (due to the finite conductivity of aluminium and to the small cross-section). Substrate losses, instead, have different origins. First, the electric field penetrates from the inductor into the substrate, closing a ground return path and thus dissipating energy by Joule heating. The magnetic field, concatenated with the spiral, penetrates into the substrate as well and induces some concatenated “eddy” current to flow into the substrate itself, thus further dissipating energy. Simulation results provide effective means to discriminate the relative weight of either energy-loss sources. The current density, therefore, can be interpreted as a fringing (inter-wire or substrate-bound) current, which clearly dominates over the magnetic-field induced current. The design flow of complex Si-RF integrated circuits heavily relies on CAD tools: among them, circuit simulation plays a fundamental role in analysing the behavior of analog (or mixed-signal) circuits. It is of the outmost importance, therefore, to provide circuit simulators (e.g., SPICE or microwave oriented ADS) with accurate, yet computationally affordable, models of the integrated devices. These models, as well as the FDTD approach, should account for actual technology parameters. A CMOS process in fact is optimised for digital applications, which hardly suffer from technology corners [5]. By contrast, due to electromagnetic phenomena taking place in the three-dimensional structure, analog applications are extremely sensitive to the fabrication process, thus models must assure that the designed inductor will perform as predicted. In this contest, a significant aid may come from the FDTD approach, which can easily correlate the inductor behavior with process parameters. The maximum and the minimum resistivity and thickness for the metal layers and the substrate are simulated and compared to the typical values. As expected the results demonstrate a great influence of such parameters on the inductor performance. On such a basis, starting from simulations, we have extracted the model parameters, being sure to account for process latitude. With reference to silicon-integrated inductors, several authors [6] have investigated such an issue, proposing lumped-element equivalent circuit topologies: by means of the distributed simulation approach introduced above, characterization of the model parameters can be carried out in a virtual environment, avoiding the need of an a posteriori experimental parameter extraction. Starting from simulated data, a two-step optimisation procedure has been carried out on the parameter values: first, a least-square fitting procedure has been performed by means of a dedicated program; then, parameters are more finely adjusted by using a commercial circuit optimiser. The good agreement between the ADS (definizione!) and the FDTD simulation demonstrates the accuracy of the proposed approach, which can, hence, be safely used to extract the equivalent circuit parameter values for the considered inductor accounting for process latitude. In summary, by resorting to 3D, numerical solution of Maxwell equations, we were able to predict quite accurately the behavior of actual planar integrated inductors and to evaluate the impact of some technological and design options. Among the advantages of such an approach, it is worth remarking its contribution to the physical and intuitive interpretation of the actual device behavior. This allowed, within a context which inherently suffers from an intricate set of interacting parasitic phenomena, for the comprehensive evaluation and discrimination of basic degradation effects. The good agreement obtained between measurements and simulations demonstrates that the developed virtual environment, capable of accounting for both technology and design layout parameters, is a useful, cheaper than fabrication, aid for the extraction of compact device models, suitable for commercial CAD packages. [1] J. Burghartz, “Progress in RF inductors on silicon- Understanding substrate losses”, Dig. IEDM, 1998. [2] W. Heinrich, K. Beilenhoff, P. Mezzanotte, and L. Roselli, "Optimum mesh grading for finite-difference method“, IEEE Trans. Microwave Theory Tech., vol. 44, pp. 1569-1574, Set 1996. [3] G. Mur, “Absorbing boundary conditions for the finite-difference approximation of the time-domain electromagnetic-field equations”, IEEE Trans. Electromagn. Compat., vol. EMC-23, no. 4, pp.377-382, 1981. [4] W. Sui, D. Christensen, and. C. Durney, “Extending the two-dimensional fd-td method to hybrid electromagnetic systems with active and passive lumped elements”, IEEE Trans. Microwave Theory Tech., vol. 40, pp. 724-730, 1992. [5] A. Niknejad and R. Meyer, “Analysis, design and optimisation of spiral inductors and transformers for Si RFIC’s”, IEEE Journal of Solid State Circuits, vol.33, pp.1470-1481, Oct. 1998. [6] W. B. Kuhn and W. Stephenson, “A 200 MHz CMOS Q-Enhanced LC Bandpass Filter”, IEEE Jounal of Solid State Circuits, vol. 31, pp. 1112-1121, Aug. 1996.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
