This work presents a wafer-level packaging solution for RF-MEMS applications based on wafer bonding techniques. A silicon cap is realized on top of the MEMS substrate and gold ring is used to provide a hermetic bond frame sealing. Coplanar buried feedthroughs have been modeled and designed for low loss and wideband RF applications. The CPW line underneath the gold ring is narrowed to minimize the parasitic effects of ring. Packaged CPW lines on silicon wafer have been manufactured and measured. Good agreement between simulations and experimental results have been obtained showing minimal impact of the package on the RF performance. The comparison between naked and packaged CPW line shows an average loss contribution due to the package of 0.2dB from dc up to 30GHz
EM Modelling, Design and Manufacturing of a Zero-Level Package for RF-MEMS applications
FARINELLI, PAOLA;SORRENTINO, Roberto
2010
Abstract
This work presents a wafer-level packaging solution for RF-MEMS applications based on wafer bonding techniques. A silicon cap is realized on top of the MEMS substrate and gold ring is used to provide a hermetic bond frame sealing. Coplanar buried feedthroughs have been modeled and designed for low loss and wideband RF applications. The CPW line underneath the gold ring is narrowed to minimize the parasitic effects of ring. Packaged CPW lines on silicon wafer have been manufactured and measured. Good agreement between simulations and experimental results have been obtained showing minimal impact of the package on the RF performance. The comparison between naked and packaged CPW line shows an average loss contribution due to the package of 0.2dB from dc up to 30GHzI documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
