IRIS - Res&Arch Institutional Research Information System - Research & Archive

MARCONI, SARA
 Distribuzione geografica
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Continente #
NA - Nord America 659
AS - Asia 573
EU - Europa 424
SA - Sud America 107
AF - Africa 12
OC - Oceania 3
Totale 1.778
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Nazione #
US - Stati Uniti d'America 633
SG - Singapore 257
IE - Irlanda 124
IT - Italia 91
BR - Brasile 89
CN - Cina 87
HK - Hong Kong 73
RU - Federazione Russa 73
VN - Vietnam 69
FI - Finlandia 30
FR - Francia 30
IN - India 18
DE - Germania 17
CA - Canada 16
GB - Regno Unito 14
UA - Ucraina 13
JP - Giappone 9
SE - Svezia 8
TR - Turchia 8
MX - Messico 7
AR - Argentina 6
EC - Ecuador 6
AT - Austria 5
BD - Bangladesh 5
ID - Indonesia 5
IQ - Iraq 5
NL - Olanda 5
SA - Arabia Saudita 5
UZ - Uzbekistan 5
ZA - Sudafrica 5
PK - Pakistan 4
AU - Australia 3
CO - Colombia 3
IL - Israele 3
JO - Giordania 3
KR - Corea 3
KZ - Kazakistan 3
BE - Belgio 2
ES - Italia 2
ET - Etiopia 2
IR - Iran 2
MY - Malesia 2
OM - Oman 2
PL - Polonia 2
RO - Romania 2
RS - Serbia 2
TH - Thailandia 2
VE - Venezuela 2
AE - Emirati Arabi Uniti 1
AL - Albania 1
BA - Bosnia-Erzegovina 1
CG - Congo 1
CH - Svizzera 1
DO - Repubblica Dominicana 1
EG - Egitto 1
HN - Honduras 1
KE - Kenya 1
LB - Libano 1
MA - Marocco 1
NP - Nepal 1
PE - Perù 1
SK - Slovacchia (Repubblica Slovacca) 1
TN - Tunisia 1
TT - Trinidad e Tobago 1
Totale 1.778
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Città #
Singapore 193
Dublin 124
San Jose 78
Chandler 73
Hong Kong 73
San Mateo 50
Ashburn 41
Altamura 32
Santa Clara 30
Beijing 27
Boardman 24
Moscow 24
Perugia 24
Medford 23
Princeton 23
Lawrence 22
Lauterbourg 20
Dong Ket 18
Foligno 18
New York 17
Wilmington 17
Ho Chi Minh City 15
Andover 13
Helsinki 12
Hanoi 9
São Paulo 9
Los Angeles 8
Saint Petersburg 8
Orem 7
Tokyo 7
Ann Arbor 6
Dallas 5
Falkenstein 5
Mumbai 5
Nuremberg 5
The Dalles 5
Brasília 4
Jeddah 4
New Delhi 4
Norwalk 4
Ottawa 4
Poplar 4
Rio de Janeiro 4
Chennai 3
Haiphong 3
Johannesburg 3
Melbourne 3
Miami 3
Montreal 3
San Paolo di Civitate 3
Seoul 3
Toronto 3
Addis Ababa 2
Amman 2
Ankara 2
Boston 2
Brooklyn 2
Brussels 2
Campinas 2
Curitiba 2
Da Nang 2
Den Haag 2
Denver 2
Faisalabad 2
Guangzhou 2
Hengshui 2
Houston 2
Kyiv 2
Mauá 2
Mexico City 2
Milan 2
Muscat 2
Petah Tikva 2
Phoenix 2
Quito 2
Redwood City 2
Ribeirão Preto 2
Ribeirão das Neves 2
San Francisco 2
Socorro 2
Surabaya 2
Tashkent 2
Tianjin 2
Vancouver 2
Warsaw 2
Aguascalientes 1
Almaty 1
Amarah 1
Amsterdam 1
Antakya 1
Aparecida de Goiânia 1
Aracaju 1
Baghdad 1
Baldwin 1
Balneário Camboriú 1
Bangkok 1
Bari 1
Barinas 1
Barra do Piraí 1
Basingstoke 1
Totale 1.206
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Nome #
65 nm Technology for HEP: Status and Perspective 135
Test beam demonstration of silicon microstrip modules with transverse momentum discrimination for the future CMS tracking detector 104
Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC 99
A prototype of a new generation readout ASIC in 65nm CMOS for pixel detectors at HL-LHC 94
A SystemVerilog-UVM Methodology for the Design, Simulation and Verification of Complex Readout Chips in High Energy Physics Applications 92
First Measurements of a Prototype of a New Generation Pixel Readout ASIC in 65 nm CMOS for Extreme Rate HEP Detectors at HL-LHC 87
Reusable SystemVerilog-UVM design framework with constrained stimuli modeling for High Energy Physics applications 86
CHIPIX65: Developments on a new generation pixel readout ASIC in CMOS 65 nm for HEP experiments 85
The RD53 collaboration’s SystemVerilog-UVM simulation framework and its general applicability to design of advanced pixel readout chips 84
Advanced power analysis methodology targeted to the optimization of a digital pixel readout chip design and its critical serial powering system 83
Pixel Chip Architecture Optimization Based on a Simplified Statistical and Analytical Model 81
Trapping in proton irradiated p(+)-n-n(+) silicon sensors at fluences anticipated at the HL-LHC outer tracker 81
Design of analog front-ends for the RD53 demonstrator chip 78
New Development on Digital Architecture for Efficient Pixel Readout ASIC at Extreme Hit Rate for HEP Detectors at HL-LHC 77
A UVM simulation environment for the study, optimization and verification of HL-LHC digital pixel readout chips 72
A prototype of pixel readout ASIC in 65 nm CMOS technology for extreme hit rate detectors at HL-LHC 69
RD53 collaboration and CHIPIX65 project for the development of an innovative pixel front end chip for HL-LHC 69
Performance Evaluation of Digital Pixel Readout Chip Architecture Operating at Very High Rate through a Reusable UVM Simulation Framework 68
Low-power optimisation of a pixel array architecture for next generation High Energy Physics detectors 67
Development of a large pixel chip demonstrator in RD53 for ATLAS and CMS upgrades 67
Results from CHIPIX-FE0, a small-scale prototype of a new generation pixel readout ASIC in 65 nm CMOS for HL-LHC 61
The RD53 effort towards the development of a 65 nm CMOS pixel readout chip for extreme data rates and radiation levels 60
Simulation of digital pixel readout chip architectures with the RD53 SystemVerilog-UVM verification environment using Monte Carlo physics data 58
A Prototype of a new generation readout ASIC in 65 nm CMOS for pixel detectors at HL-LHC 40
Totale 1.897
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Categoria #
all - tutte 8.473
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 8.473
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/202118 0 0 0 0 0 0 0 0 0 0 0 18
2021/2022151 1 28 0 0 3 0 3 64 3 0 22 27
2022/2023325 23 66 18 5 23 23 0 5 139 1 18 4
2023/2024111 10 14 7 2 1 0 40 0 0 3 15 19
2024/2025310 2 24 27 1 31 21 5 33 73 18 61 14
2025/2026714 41 55 51 89 120 60 111 42 89 56 0 0
Totale 1.897